ASIC Emulation Engineer

Location:
(28760) Spain
Salary:
market rate
Type:
Permanent
Main Industry:
Search Information Technology Jobs
Advertiser:
microTECH Global Ltd
Job ID:
132075654
Posted On:
10 July 2025

A growing and innovative player providing revolutionary solutions in the high-speed optical networking market is searching for a talented and passionate engineer to join their team responsible for ASIC Emulation & Characterization.

Responsibilities:

• Develop and execute verification by emulation test plans for complex SoC designs in FPGA based platforms having high speed interfaces like USXGMII, XFI, PCIe, DP MIPI C-PHY or MIPI D-PHY.

• Implement and debug FPGA builds using Xilinx Vivado, including synthesis, placement, routing, constraints development, and timing analysis. • Conduct silicon bring-up and functional validation in the lab.

• Perform PVT (Process, Voltage, Temperature) characterization to validate silicon performance and behaviour across operational corners.

• Work with lab instruments such as real and equivalent time oscilloscopes, spectrum analyzers, network analyzers, logic analyzers, BERT testers, AWG generators, signal generators, bench multi-meters, and power supplies for signal capture and system debug.

• Review and interpret hardware schematics to support system-level bring-up and debug activities.

• Automate test setups, regression systems, and data collection pipelines using scripting (Matlab, TCL, Python, Shell).

• Collaborate closely with RTL, verification, board design, and software teams to drive debug closure and validate performance targets.

Profile

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.

• 4+ years of experience in ASIC/SoC verification by emulation, FPGA prototyping, or silicon bring-up and characterization.

• Passion for learning from experience, analytical

• Capability to accept system design responsibilities.

• Proactive (problem solving) attitude

Please do reach out via # if you wish to learn more.

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