Job Description
Job: Verification Engineer – UVM
Location: Sweden/Remote
Duration: End of year minimum
Start Date: ASAP
A client based in Sweden is looking for an UVM verification Engineer, this will be for an initial 6-12 month contract with extensions. The role can be performed remotely.
The successful Verification engineer will be joining a team that is being newly formed within our client’s offices and will help to expand on projects being worked, both new and existing within other teams. You will be involved in new and existing ASIC projects.
Skills:
– Strong background in ASIC Verification
– System Verilog/UVM
– Knowledge of IP block level verification
– Multi-clock domains
– RTL within Verilog, VHDL and/or SystemVerilog
– Used to working with complex ASIC and/or large FPGA designs
To help us track our recruitment effort, please indicate in your email/cover letter where (vacanciesin.eu) you saw this job posting.
vacanciesin.eu Job DescriptionMissions du métierAu sein du département Customer Excellence and Operations (CE&O), le Senior…
vacanciesin.eu Titre du poste : Coordinateur de production - Pharmacien de Permanence Pharmaceutique H/F Site…
vacanciesin.eu Description Rattaché.e au Chef d’Equipe Maintenance, vous réaliserez les opérations de maintenance préventives des…
vacanciesin.eu Vos missions au quotidien Conseiller les équipes de Structuration de la salle des marchés…
vacanciesin.eu Job Family: Internal Services Req ID: 426452 Continuité numérique, simulation multiphysiques, jumeaux numériques, exploitation…
vacanciesin.eu Vos missions au quotidien Accompagner Sarah et Louis pour le financement de leur voiture,…