SoC Architect

Location:
(2628) Netherlands
Salary:
100K – 140K
Type:
Permanent
Main Industry:
Search Engineering Jobs
Advertiser:
microTECH Global Ltd
Job ID:
133191073
Posted On:
15 July 2026

Job Title: SoC Architect

Location:
The Netherlands

Job Type: Permanent

Salary: Range 100K – 140K Euros per annum

Role Overview:

Looking for a SoC Architect. Someone who thrives in an environment where your proactive and can-do attitude is highly appreciated.

Key Responsibilities:

-System Design & Integration: You will be responsible for defining the high-level architecture of the SoC, determining which components will be included on the chip.
-You will collaborate with the hardware design teams to guide the implementation of the chip’s physical design.
-You will coordinate with our firmware & GNSS team to ensure the SoC Architecture supports efficient execution of software, including drivers, operating systems and applications.
-You will define and implement security features to protect the SoC from vulnerabilities.
-You will keep up with the advances in the semiconductor industry and make sure the SoC architecture remains scalable and adaptable for future generations of products.
-Managing product timelines and deliverables, making sure that the SoC Development follows the planned schedule and stays within budget.

Experience Required:

-Minimum of 12 years’ experience in RTL Design, RTL Verification, CPU-based Chip/Components Concepts and Architecture.
-Deep understanding of ARM MCUs Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, Flash, NVMe…).
-At least 10 years’ experience with the Digital ASIC Flows, RTL design, Design Verification, Debug and Trace methodologies, Test (e.g., DFT, JTAG, Scan, BIST).
-Solid understanding of chip packaging.
-Proficient in hardware-software interface design, including device drivers, firmware, and low-level software optimizations.
-Strong problem-solving skills to troubleshoot and resolve architectural issues related to SoC integration, performance, and power efficiency.
-Experienced with silicon bring-up, validation, and post-silicon debug methodologies.
-Practical experience with IP integration, including integration flows, interconnect design (e.g., AMBA, AXI, AHB), and managing key IP integration architecture tasks.
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