Verification (UVM) Design Engineer – Bucharest

Location:
(R1111) Romania
Salary:
market rate
Type:
Permanent
Main Industry:
Search Engineering Jobs
Advertiser:
microTECH Global Ltd
Job ID:
132975245
Posted On:
11 May 2026

We are seeking an experienced Design Verification Engineer to join the team.

What you’ll do

-Architecture, definitions and documentation of DV in mixed-mode SoCs.
-Test program definition and implementation
-Test bench creation in UVM and System Verilog environment
-Functional verification
-Regression triage and test debug
-Tight work and coordination with Front-end, Architecture, SW and DSP teams
Required Qualifications

-Bachelor or higher degree, in Electrical or Computer Engineering or adjacent field
-At least 7 years of proven industrial experience in Design Verification.
-Proven experience in embedded and mixed-mode SoC designs.
-Deep knowledge in UVM and SystemVerilog.
-Deep knowledge in state-of-the-art Design and DV tools.
-Good familiarity with embedded SW, FPGA, and Emulators.
-Strong analytical and problem-solving skills.
-Excellent written and verbal communication skills.
-Excellent Team player with superb teamwork capabilities.
Preferred Qualifications

-RNM or SVA or Formal knowledge
-Experience with Front-end design flows
-Understanding analog circuit designs

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yonnetim

Published by
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