Software Validation Engineer (SoC) – Paris

Location:

(CS 40095) France

Salary:

market rate

Type:

Permanent

Main Industry:

Search Engineering Jobs

Advertiser:

microTECH Global Ltd

Job ID:

130220388

Posted On: 

18 March 2024

As a Senior Staff EDA Software Validation Engineer , you will have opportunity to be part of a validation team with leading-edge Electronic Design Automation expertise and you will work on the most advanced SoC assembly and Hardware/Software interface flows.
You will join a proven-successful company, and be able to influence development environment, architecture, verification, and everything in-between.

Responsibilities
Contribute to the functional specification of SoC integration automation products in collaboration with the Product Owner.
Qualify the expected inputs and outputs (RTL, documentation, etc.) of our software using various CAD tools (simulators, formal proof, etc…).
Set up the test examples, reference files and scripts (Python, Tcl, Java) allowing the automated execution of the test suite.
Define test plans in collaboration with the Product Owner and software development/QA teams.
Create and participate to comprehensive test campaigns.
Identify and implement tests to be automated in the QA validation phase.
Validate the graphical interface and APIs used by our customers.
Maintain and enhance tests in the continuous integration flow, improve metrics, and increase automation.
Identify and setup automation frameworks for new tests or new types of tests.
Maintain our internal libraries (Python modules, Java plugins) for automated tests.
Help improve and refine processes, methodologies, and metrics.

Experience and Qualifications
Required
10+ years of industry experience as semiconductor CAD flow developer (Electronic Design Automation) and/or SoC design/verification engineer.
Demonstrated experience designing and building software frameworks to assemble and verify complex System-on-Chips.
Understanding of Hardware RTL design and verification languages (VHDL, Verilog, SystemC, C++, Python, Tcl, SystemVerilog), able to run on any available RTL simulator (Cadence, Synopsys, Siemens).
Knowledge of XML IP-XACT standard.
Proficient in scripting languages (Tcl/Python) development and with GIT version control.
Strong written and verbal communication skills in both French and English (native or CEFR C2 level in both languages)
Curious, autonomous, rigorous, and delivery-oriented with a commitment to quality and a thorough approach to the work.
Desired
Experience as QA engineer in software validation under agile methodology and in API test automation
Eclipse RCP
ISTQB certified
Knowledge of Squish/Cucumber
Knowledge of TDD, BDD approaches and tools
Understanding of CI/CD (Jenkins…)
Experience in Java development and JUnit unit tests

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